GaN on Engineered Bulk Si (GaN-on-EBUS) Substrate for Monolithic Integration of High-/Low-Side Switches in Bridge Circuits

A cost-effective engineered bulk silicon (EBUS) substrate technology is presented, featuring p-n junction implemented on bulk Si substrates using mainstream ion implantation and thermal annealing processes. Standard p-GaN/AlGaN/GaN heterostructures are successfully grown on the EBUS substrate and used to fabricate 200-V enhancement-mode p-GaN gate HEMTs. By creating deep trenches in the EBUS substrate to isolate the local P+ silicon regions underneath the high-side (HS) and low-side (LS) power switches, adverse effects (e.g., back-gating and dynamic ON-resistance degradation) in the use of conventional bulk Si substrate are all eliminated. The mechanism of crosstalk suppression in the GaN-on-EBUS platform is revealed in comparison with conventional GaN-on-Si platform and verified by a series of designed tests.

Automated summary

This study presents a cost-effective engineered bulk silicon (EBUS) substrate technology, which successfully implements p-n junction on bulk Si substrates. The adverse effects of conventional substrates are eliminated, and the mechanism of crosstalk suppression in the EBUS platform is revealed and verified through tests.