期刊
2D MATERIALS
卷 9, 期 2, 页码 -出版社
IOP Publishing Ltd
DOI: 10.1088/2053-1583/ac5b17
关键词
dichalcogenide semiconductor; indium selenide; ferroelectric semiconductor field effect transistor (FeSFET); low-temperature processing; temperature-dependent transport; memory performance
资金
- National Science Foundation (NSF) [1433378, DMR-1539916]
- center for 3D Ferroelectric Microelectronics (3DFeM), an Energy Frontier Research Center - U.S. Department of Energy (DOE), Office of Science, Basic Energy Sciences [DE-SC0021118]
- U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences Energy Frontier Research Centers program [DE-SC0020145]
This study demonstrates low-temperature processed transistors compatible with the back-end-of-the-line, which provides a new approach for improving energy efficiency and chip performance.
As scaling becomes increasingly difficult, there is growing interest in vertical or three-dimensional stacking of transistors and especially memory. Ferroelectric semiconductor field effect transistors can be key enablers to improve energy efficiency and overall chip and memory performance. In this work, low-temperature processed, back-end-of-the-line compatible transistors were demonstrated by depositing a layered chalcogenide ferroelectric semiconductor, beta-phase In2Se3, at temperature as low as 400 degrees C. Top gate n-channel In2Se3 thin film transistors were fabricated with field-effect mobility similar to 1 cm(2) V-1 s(-1), and simple polarization switching based memory results are presented.
作者
我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。
推荐
暂无数据