4.6 Article

Scalable production of p-MoTe2/n-MoS2 heterostructure array and its application for self-powered photodetectors and CMOS inverters

期刊

2D MATERIALS
卷 9, 期 3, 页码 -

出版社

IOP Publishing Ltd
DOI: 10.1088/2053-1583/ac7055

关键词

2D semiconductor; MoTe2; van der Waals heterostructure; photodetector

资金

  1. National Key Research and Development Program [2021YFA1200500, 2017YFA0207303]
  2. Natural Science Foundation of China [21771040, 620 74043]
  3. Shanghai Municipal Science and Technology Commission [19ZR1473400, 21DZ1100900]
  4. Yiwu Research Institute Program of Fudan University [20-1-04]
  5. Shanghai Municipal Education Commission [2021-01-07-00-07-E00077]
  6. young scientist project of MOE innovation platform

向作者/读者索取更多资源

The fabrication and characterization of wafer-scale heterostructure arrays composed of multilayer 2H-MoTe2 and single-layer 2H-MoS2 are demonstrated. The p-MoTe2/n-MoS2 heterostructure devices exhibit an excellent gate-tunable PN diode behavior and complementary inverters.
Recent advances in van der Waals heterostructures have extensively promoted the development of new-generation electronic devices. However, the normally utilized mechanical exfoliation method for preparing two-dimensional semiconductors is not scalable for circuit-level application. Herein, the fabrication and characterization of wafer-scale heterostructure arrays composed of multilayer 2H-MoTe2 and single-layer 2H-MoS2 are demonstrated. Owing to the type-II band alignment facilitating efficient electron-hole separation, the devices fabricated by the p-MoTe2/n-MoS2 heterostructure exhibit an excellent gate-tunable PN diode behavior, with a rectification ratio of over 10(3) and a self-powered photocurrent with a remarkable on-off ratio of similar to 10(3) at a zero bias voltage. Complementary inverter arrays based on p-MoTe2/n-MoS2 are also demonstrated. The scalable production of p-n junction devices and complementary inverters paves the way for future integrated platforms in photoelectric detection and logic computation.

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