Design of an Efficient Reverse Converter for Moduli Sets 24p+1,2p+1,2p-1,22p+1,22p

In this paper, the reverse converter design for moduli sets 2(p) - 1,2(p),2(p+1) is proposed. This design for five moduli sets 2(4p) + 1,2(2p), 2(2p)+ 1,2(p) +1,2(p) - 1 by using the new Chinese Remainder Theorem (CRT-1) formulates the wide modular devaluation. The appropriate selection of moduli has a significant impact on the reverse converter's speed and complexity. The modified converter depends upon the arithmetic designs that are implemented without the read - only memories and lookup tables. The Carry Save Adder and Carry Propagate Adder are used in the reverse converter and modulo adder gives higher speed and less hardware complexity. The proposed converter has been implemented to get the conversion time and area as supported by the reverse converter of 12-bits and maximum up to 100-bits.

Automated summary

This paper proposes a reverse converter design for specific moduli sets using a new form of Chinese Remainder Theorem, which allows for wide modular computation. The appropriate selection of moduli is crucial for improving the speed and reducing the complexity of the converter. The modified converter relies on arithmetic designs without the need for read-only memories and lookup tables. The use of Carry Save Adder and Carry Propagate Adder in the reverse converter and modulo adder results in higher speed and less hardware complexity. The proposed converter has been implemented and evaluated for 12-bit to 100-bit conversion.