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注意:仅列出部分参考文献,下载原文获取全部文献信息。Comprehensive review on electrical noise analysis of TFET structures
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Impact of interface trap charges on device level performances of a lateral/vertical gate stacked Ge/Si TFET-on-SELBOX-substrate
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Impact of heterogeneous gate dielectric on DC, RF and circuit-level performance of source-pocket engineered Ge/Si heterojunction vertical TFET
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Temperature sensitivity analysis of vertical tunneling based dual metal Gate TFET on analog/RF FOMs
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A new structure of electrically doped TFET for improving electronic characteristics
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TCAD simulation of SOI TFETs and calibration of non-local band-to-band tunneling model
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Adrian M. Ionescu et al.
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Low-frequency noise behavior of tunneling field effect transistors
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