4.6 Article

Performance Improvement of Memristor-Based Echo State Networks by Optimized Programming Scheme

期刊

IEEE ELECTRON DEVICE LETTERS
卷 43, 期 6, 页码 866-869

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2022.3165831

关键词

Memristors; Reservoirs; Degradation; Training; Programming; Power demand; Hardware; Echo state networks; memristor; hardware-software co-implantation; PDP scheme

资金

  1. MOST of China [2021ZD0201203, 2018YFB0407500, 2019YFB2205100, 2018YFA0701500]
  2. NSFC [61804173, 61834009, 62025406, 61904197, 61874138]
  3. Strategic Priority Research Program of the Chinese Academy of Science (CAS) [XDB44000000]

向作者/读者索取更多资源

This letter proposes a hardware-software co-design platform for implementing memristor crossbar arrays for ESN model and improves the network performance through the programming with delayed pulse scheme.
The Echo State Networks (ESNs) is a class of recurrent neural network (RNN), which can significantly reduce the training complexity since the input layer and middle layer (reservoir) are random fixed networks. In this letter, we propose a hardware-software co-design platform to implement memristor crossbar arrays for ESN model. We propose the programming with delayed pulse (PDP) scheme to improve the network performance by suppressing the degradation of the memristor. We optimized the spectral radius (SR) of the ESNs model. In addition, the programming scheme can also effectively improve the timing prediction capability of the memristor-based ESN network. When the prediction length is set to 1000, the Normalized Root Mean Square Error (NRMSE) of the ESN can be optimized by 56 times.

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