4.4 Article

A multi-value 3D crossbar array nonvolatile memory based on pure memristors

期刊

EUROPEAN PHYSICAL JOURNAL-SPECIAL TOPICS
卷 231, 期 16-17, 页码 3119-3130

出版社

SPRINGER HEIDELBERG
DOI: 10.1140/epjs/s11734-022-00576-9

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资金

  1. National Natural Science Foundation of China [62171182]
  2. Natural Science Foundation of Hunan Province [2021JJ30147]

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This paper proposes a high storage density and high reading/writing speed 3D crossbar array non-volatile memory based on pure memristors. By introducing an extensible memristive cluster, designing a memristive switch, and constructing a 3D crossbar array non-volatile memory, the conflict between storage density and sneak path current effect is solved, greatly improving the storage density and reading/writing speed.
How to improve the storage density and solve the sneak path current problem has become the key to the design of nonvolatile memristive memory. In this paper, a high storage density and high reading/writing speed 3D crossbar array non-volatile memory based on pure memristors is proposed. The main works are as follows: (1) an extensible memristive cluster is proposed, (2) a memristive switch is designed, and (3) a 3D crossbar array non-volatile memory is constructed. The memory cell of the 3D crossbar array non-volatile memory is constructed by pure memristors and can be extended by adding memristor in a memristive cluster or adding memristive clusters in a memory cell to realize multi-value storage. The memristive switch can effectively reduce the sneak path current effect. The pure memristive memory cell solves the conflict between the storage density and sneak path current effect and greatly improves the storage density of memory cells. Furthermore, the 3D cross-array structure allows different memory cells on the same layer or different layers to be read and written in parallel, which greatly improves the speed of reading and writing. Simulations with PSpice verifies that the proposed memristive cluster can realize stable multi-value storage, has higher storage density, faster reading and writing speed, fewer input ports and output ports, better stability, and lower power consumption. Moreover, the structure proposed in this paper can also be used in the circuit design of the neuromorphic network, logic circuit, and other memristive circuits.

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