期刊
JAPANESE JOURNAL OF APPLIED PHYSICS
卷 55, 期 6, 页码 -出版社
IOP PUBLISHING LTD
DOI: 10.7567/JJAP.55.060306
关键词
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资金
- National Research Foundation Singapore through the Singapore MIT Alliance for Research and Technology's LEES IRG research programme
Deep level traps present in GaN LED grown on 8 in. Si substrate were revealed by deep level transient spectroscopy (DLTS). One electron trap located at E-C - 0.7 eV was revealed in the n-GaN barrier layer. Two electron traps and one hole trap were observed in the p-GaN layer. They are located at E-C - 0.60 eV, E-C - 0.79 eV and E-V + 0.70 eV. The total trap density in both the n-GaN barrier layer and the p-GaN layer of the LED is in order of 10(14) cm(-3), which is comparable with that found in GaN epi-layer grown on sapphire. (C) 2016 The Japan Society of Applied Physics
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