4.7 Article

High-Efficiency Si/PEDOT:PSS Hybrid Heterojunction Solar Cells Using Solution-Processed Graphene Oxide as an Antireflection and Inversion-Induced Layer

期刊

ACS APPLIED ENERGY MATERIALS
卷 4, 期 11, 页码 13279-13287

出版社

AMER CHEMICAL SOC
DOI: 10.1021/acsaem.1c02869

关键词

PEDOT; PSS; heterojunction solar cell; graphene oxide; inversion layer; antire fl ection layer

资金

  1. National Natural Science Foundation of China [61804070, 11674138]
  2. Fundamental Research Funds for the Central Universities [lzujbky-2021-60]

向作者/读者索取更多资源

The incorporation of a graphene oxide (GO) layer between the Ag electrode and PEDOT:PSS layer in Si/PEDOT:PSS HHSCs leads to the formation of a strong inversion layer near the Si/PEDOT:PSS interface, resulting in the Si/PEDOT:PSS junction converting into a quasi p-n junction. This structure enhances the built-in potential and suppresses carrier recombination at the interface, resulting in a high-efficiency solar cell with improved performance on textured Si substrate.
Due to their high photoelectric conversion efficiency (PCE) and low-cost fabrication process, n-type silicon (n-Si)/ poly(3, 4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) hybrid heterojunction solar cells (HHSCs) have received extensive attention. However, inferior junction quality and the lower open-circuit voltage (Voc) hinder further improvement in PCE. Here, we have prepared a graphene oxide (GO) layer between the Ag electrode and PEDOT:PSS layer in Si/PEDOT:PSS HHSCs by using a solution process. The study reveals that a strong inversion layer has been established near the Si/PEDOT:PSS interface, resulting in the Si/PEDOT:PSS junction converting into a quasi p-n junction. The inversion effect enhances the built-in potential (Vbi) and suppresses the carrier recombination at the interface of Si/PEDOT:PSS. Moreover, solution-processed GO on PEDOT:PSS is a proper antireflection layer to reduce reflection because of its well-matched refractive index. As a result, the planarSi/PEDOT:PSS/GO HHSC displays a highest PCE of 13.76% with a satisfactory short-circuit current (Jsc) and Voc of 28.59 mA/ cm2 and 648 mV, respectively, which is obviously higher than that of the devices without a GO layer. The PCE is further improved to 15.43% by using a textured Si substrate. These findings provide a method for the fabrication of high-performance and low-cost Sibased heterojunction solar cells.

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