4.8 Article

Mobility-stability trade-off in oxide thin-film transistors

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NATURE ELECTRONICS
卷 4, 期 11, 页码 800-807

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NATURE PORTFOLIO
DOI: 10.1038/s41928-021-00671-0

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  1. MEXT Element Strategy Initiative: To Form Core Research Centers [JPMXP0112101001]

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This study successfully fabricated ultrastable thin-film transistors with mobilities of 70 cm(2) (V s)(-1) by understanding the origins of instability in high-mobility amorphous oxide transistors. The research identified the sensitivity of amorphous oxide semiconductors to externally introduced impurities and defects, and explained the mechanism of how carbon-monoxide-related impurities affect the stability of high-mobility indium tin zinc oxide transistors.
By understanding the origins of instability in high-mobility amorphous oxide transistors, ultrastable thin-film transistors with mobilities of 70 cm(2) (V s)(-1) can be fabricated. Thin-film transistors based on amorphous oxide semiconductors could be used to create low-cost backplane technology for large flat-panel displays. However, a trade-off between mobility and stability has limited the ability of such devices to replace current polycrystalline silicon technologies. Here we show that the sensitivity of amorphous oxide semiconductors to externally introduced impurities and defects is determined by the location of the conduction-band minimum and the relevant doping ability. Using bilayer-structured thin-film transistors, we identify the exact charge-trapping position under bias stress, which shows that the Fermi-level shift in the active layer can occur via electron donation from carbon-monoxide-related impurities. This mechanism is highly dependent on the location of the conduction-band minimum and explains why carbon-monoxide-related impurities greatly affect the stability of high-mobility indium tin zinc oxide transistors but not that of low-mobility indium gallium zinc oxide transistors. Based on these insights, we develop indium tin zinc oxide transistors with mobilities of 70 cm(2) (V s)(-1) and low threshold voltage shifts of -0.02 V and 0.12 V under negative- and positive-bias temperature stress, respectively.

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