Adaptive estimation-based hierarchical model predictive control methodology for battery active equalization topologies: Part I-Balancing strategy

State-of-charge (SOC) balancing is a critical issue for the development of battery management systems for electric vehicles. In the series of two papers, an adaptive estimation-based hierarchical model predictive control (MPC) balancing methodology is proposed to explore different equalization topologies. In the first paper, the superior control for optimal SOC balancing in typical topologies, i.e., dissipative, unidirectional adjacent, bidirectional adjacent, and bus-based, is developed by formulating the proposed MPC. SOC balancing problems of different topologies are modeled by describing the behavior of energy transferring during the charge/discharge process considering practical loss. The MPC balancing strategy is proposed to solve the constrained quadratic optimi-zation by minimizing the balancing time and energy loss. A rule-based fuzzy logic control (FLC) balancing is compared, and in the 5-series cells simulation, the result indicates that the balancing time of MPC and FLC are 292 s and 654 s, respectively. To verify the real-time feasibility of the proposed MPC balancing strategy, a controller hardware-in-the-loop (HIL) test is further implemented. Finally, the influences of bidirectional adja-cent and bus-based topologies on equalization performance are discussed, demonstrating a strong correlation between the number of series-connected cells and adopted topology. The proposed MPC-based superior control can be integrated with the later designed low-level adaptive estimation laws driven individual cell equalizer (ICE) controller to comprehensively tackle SOC optimal balancing problems.

Automated summary

This paper proposes an adaptive estimation-based hierarchical model predictive control (MPC) balancing methodology to address the critical issue of state-of-charge (SOC) balancing in battery management systems for electric vehicles. The proposed MPC strategy is evaluated through simulations and real-time hardware-in-the-loop (HIL) tests, demonstrating its superior performance in minimizing balancing time and energy loss. The study also discusses the impact of different equalization topologies on balancing performance.