Sub-10 nm Top Width Nanowire InGaAs Gate-All-Around MOSFETs With Improved Subthreshold Characteristics and Device Reliability

In this article, sub-10 nm top width nanowire In0.53Ga0.47As gate-all-around (GAA) MOSFETs with improved subthreshold characteristics and reliability are demonstrated. These devices exhibit a significant improvement in the subthreshold performances with subthreshold swing (SS) of 70 mV/dec, drain induced barrier lowering (DIBL) of 46 mV/V, and off-current (I-off) of 1.6x10(-4) mu A/mu m for InGaAs GAA MOSFETs. Effective control of short channel effects (SCEs) is confirmed by the error bar of statistical variation analysis. Under gate bias stress, a low degradation of SS and threshold voltage (V-th) shift has been achieved due to N-2 RP treatment of the InGaAs GAA MOSFETs. The superior performance can be attributed to the strong electrostatic control and high quality of high-kappa/InGaAs interface, originating from shrinking nanowire width and RP passivation effects. These results show the developed GAA MOSFET devices have good potential for future low-power high-switching speed CMOS logic applications.

Automated summary

This article demonstrates improved subthreshold characteristics and reliability of sub-10 nm top width nanowire In0.53Ga0.47As gate-all-around (GAA) MOSFETs. The devices show significant improvement in subthreshold performances and effective control of short channel effects. Low degradation of subthreshold swing and threshold voltage shift is achieved under gate bias stress due to N-2 RP treatment. These results indicate that the developed GAA MOSFET devices have great potential for future low-power high-switching speed CMOS logic applications.