HVDC Grid Fault Current Limiting Method Through Topology Optimization Based on Genetic Algorithm

Limiting fault current level of high-voltage direct current (HVDC) grid is conducive to reduce the cost of current limiting devices and to relieve the stringent time constraints on protection, but the main concentrations are focused on pole-to-pole fault, while few attentions have been paid to pole-to-ground fault, especially in symmetrical mono-pole dc grid. This article proposes a pole-to-ground fault current limiting method through topology optimization, which is implemented in three steps. The influence factors of pole-to-ground fault current in symmetrical mono-pole HVDC grid are clarified in the first step, which is based on the detailed state space model of dc grid. And the fact that the topology of dc grid influences fault current a lot is confirmed. In the second step, a simplified index is proposed based on the above theoretical analysis, thus the fault current level of each topology can be estimated in a simple and efficient way. At last, to limit the pole-to-ground fault current level, the genetic algorithm is used to optimize the dc grid topology. The optimization results of studied cases indicate that the mesh structure or ring structure is recommendable for dc grid in term of fault current limiting.

Automated summary

This article proposes a method to limit the pole-to-ground fault current in symmetrical mono-pole HVDC grid through topology optimization, implemented in three steps. The influence factors are clarified in the first step and a simplified index is proposed in the second step for estimating fault current level. The genetic algorithm is used in the final step to optimize the dc grid topology for limiting fault current level.