期刊
SENSORS
卷 21, 期 24, 页码 -出版社
MDPI
DOI: 10.3390/s21248203
关键词
approximate adder; low-power; approximate computing; CNFET; PDP
资金
- Department of Engineering, La Trobe University, Melbourne, Australia
In this study, 10T and 13T approximate adder designs using CNFET technology were proposed, showcasing excellent performance in terms of energy efficiency and accuracy compared to existing circuit designs.
Adders are constituted as the fundamental blocks of arithmetic circuits and are considered important for computation devices. Approximate computing has become a popular and developing area, promising to provide energy-efficient circuits with low power and high performance. In this paper, 10T approximate adder (AA) and 13T approximate adder (AA) designs using carbon nanotube field-effect transistor (CNFET) technology are presented. The simulation for the proposed 10T approximate adder and 13T approximate adder designs were carried out using the HSPICE tool with 32 nm CNFET technology. The metrics, such as average power, power-delay product (PDP), energy delay product (EDP) and propagation delay, were carried out through the HSPICE tool and compared to the existing circuit designs. The supply voltage V-dd provided for the proposed circuit designs was 0.9 V. The results indicated that among the existing full adders and approximate adders found in the review of adders, the proposed circuits consumed less PDP and minimum power with more accuracy.
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