4.8 Review

A Review of Multilevel Converters With Parallel Connectivity

期刊

IEEE TRANSACTIONS ON POWER ELECTRONICS
卷 36, 期 11, 页码 12468-12489

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2021.3075211

关键词

Multilevel converters; Capacitors; Switches; Topology; Optimization; Measurement; Capacitance; Capacitance saving; cascaded-bridge converter (CBC); modular multilevel converter (MMC); submodule parallelization; switched-capacitor converter; topology; voltage balance

资金

  1. Alexander von Humboldt Foundation
  2. KSB Foundation
  3. National Science Foundation [1608929]
  4. Duke Energy Research Seed Fund
  5. Div Of Electrical, Commun & Cyber Sys
  6. Directorate For Engineering [1608929] Funding Source: National Science Foundation

向作者/读者索取更多资源

The study on parallel connectivity of multilevel converters highlights advantages such as sensorless voltage balancing, capacitance saving, current sharing, and system efficiency optimization. Various submodules, macrolevel circuit topologies, implementation challenges and solutions, as well as control and optimization schemes are covered in the article.
Cascaded-bridge converters (CBCs) and modular multilevel converters (MMCs) enjoy growing popularity mostly due to modularity and scalability. Conventionally, their submodules allow only serial and bypass operation so that the use of low-voltage components for high-voltage output becomes possible. Dually, submodule parallelization adds the switched-capacitor behavior to CBCs/MMCs and has witnessed an upward trend in recent years. The salient advantages of parallel operation comprise sensorless voltage balancing, capacitance saving, current sharing, and system efficiency optimization. To capture the advancement in the field, this article reviews the state-of-the-art multilevel converters with parallel connectivity, covering various submodules, macrolevel circuit topologies, implementation challenges, and solutions, as well as control and optimization schemes. In particular, this article derives and classifies submodules as well as macro-level topologies according to basic H-bridge, asymmetrical half-bridge, and symmetrical half-bridge submodules. On top of that, this article introduces strategies for the simplification of submodules and the creation of novel topologies yet maintaining parallel connectivity. We highlight the role of graph theory in creating new analytic and synthetic methodologies for multilevel converters. In addition, this article discloses the relationship between multilevel converters with parallel connectivity and switched-capacitor converters.

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