期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 69, 期 3, 页码 1069-1076出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2022.3141036
关键词
Carbon nanotube (CNT); hysteresis; laminated hafnium oxide (HfO2)/alumina (Al2O3); thin-film transistor (TFT)
资金
- Guangdong Science and Technology Plan [2019B010934001]
- Research and Development Funds for Science and Technology Program of Guangzhou [202007020004]
- Key-Area Research and Development Program of Guangdong Province [2019B010934001, 2020B010183001]
- Southwest Institute of Technology and Engineering Cooperation Fund [HDHDW5902020402]
- Pearl River S&T Nova Program of Guangzhou [201806010090]
In this study, laminated hafnium oxide/alumina was used as the encapsulation material to improve the performance of carbon nanotube thin-film transistors (CNT-TFT). The laminated HfO2/Al2O3 showed excellent hysteresis suppression ability and improved reliability and gate bias stress stability for the TFT devices. The hysteresis suppression was mainly attributed to the removal of water and oxygen molecules adsorption on the carbon nanotubes backchannel surface and the passivation effect to the defects at the interface between the carbon nanotubes and the gate insulator.
Laminated hafnium oxide (HfO2)/alumina (Al2O3) fabricated by atomic layer deposition (ALD) process is employed as an encapsulation to improve the performance of carbon nanotube thin-film transistor (CNT-TFT). The outstanding hysteresis suppression ability of laminated HfO2/Al2O3 is demonstrated in the transfer characteristic of thin-film transistor (TFT) devices, with the threshold voltage variation (V-th) of different scanning directions decreasing from similar to 11.06 to similar to 0.48 V after encapsulation, which is mainly attributed to the removal of water and oxygen molecules adsorption on the carbon nanotubes (CNTs) backchannel surface and the passivation effect to the defects at the interface between the CNTs and the gate insulator. It appears that the CNT-TFT with laminated HfO2/Al2O3 with an optimized 5 nm/5 nm structure exhibits excellent hysteresis suppression ability and performance improvement. In addition, the TFT devices with the optimal laminated HfO2/Al2O3 layers also show great reliability and gate bias stress stability.
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