相关参考文献
注意:仅列出部分参考文献,下载原文获取全部文献信息。Accumulation-Mode Lateral Double-Diffused MOSFET Breaking Silicon Limit by Eliminating Dependence of Specific ON-Resistance on Doping Concentration
Yandong Wang et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2021)
Novel LDMOS With Integrated Triple Direction High-k Gate and Field Dielectrics
Jiafei Yao et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2021)
An Ultralow On-Specific Resistance Trench MOSFET With Multiple Stepped Accumulation Layer for Conduction
Moufu Kong et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2021)
Experimental Study of 600 V Accumulation-Type Lateral Double-Diffused MOSFET With Ultra-Low On-Resistance
Gaoqiang Deng et al.
IEEE ELECTRON DEVICE LETTERS (2020)
Accumulation-Mode Device: New Power MOSFET Breaking Superjunction Silicon Limit by Simulation Study
Baoxing Duan et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2020)
Novel Self-Modulated Lateral Superjunction Device Suppressing the Inherent 3-D JFET Effect
Wentong Zhang et al.
IEEE ELECTRON DEVICE LETTERS (2020)
A Novel Ultralow RON,sp Triple RESURF LDMOS With Sandwich n-p-n Layer
Ming Qiao et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2020)
Novel Lateral Double-Diffused MOSFET With Ultralow On-Resistance by the Variable Resistivity of Drift Region
Yandong Wang et al.
IEEE ELECTRON DEVICE LETTERS (2020)
New Super-Junction LDMOS Breaking Silicon Limit by Multi-Ring Assisted Depletion Substrate
Baoxing Duan et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2019)
Novel LDMOS Optimizing Lateral and Vertical Electric Field to Improve Breakdown Voltage by Multi-Ring Technology
Ziming Dong et al.
IEEE ELECTRON DEVICE LETTERS (2018)
Theory Analyses of SJ-LDMOS With Multiple Floating Buried Layers Based on Bulk Electric Field Modulation
Zhen Cao et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2018)
A High-Voltage Quasi-p-LDMOS Using Electrons as Carriers in Drift Region Applied for SPIC
Bo Yi et al.
IEEE TRANSACTIONS ON POWER ELECTRONICS (2018)
Novel lateral double-diffused MOSFET with folded silicon and high-permittivity dielectric breaking silicon limit
Baoxing Duan et al.
SUPERLATTICES AND MICROSTRUCTURES (2018)
Novel Superjunction LDMOS (>950 V) With a Thin Layer SOI
Wentong Zhang et al.
IEEE ELECTRON DEVICE LETTERS (2017)
Ultra-Low On-Resistance LDMOS With Multi-Plane Electron Accumulation Layers
Weiwei Ge et al.
IEEE ELECTRON DEVICE LETTERS (2017)
A 300-V Ultra-Low-Specific On-Resistance High-Side p-LDMOS With Auto-Biased n-LDMOS for SPIC
Bo Yi et al.
IEEE TRANSACTIONS ON POWER ELECTRONICS (2017)
Ultralow ON-Resistance High-Voltage p-Channel LDMOS With an Accumulation-Effect Extended Gate
Xiaorong Luo et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2016)
A novel 1200-V LDMOSFET with floating buried layer in substrate
Jianbing Cheng et al.
IEEE ELECTRON DEVICE LETTERS (2008)
Efficacy of charge sharing in reshaping the surface electric field in high-voltage lateral RESURF devices
M Imam et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2004)