Optimizing Ferroelectric and Interface Layers in HZO-Based FTJs for Neuromorphic Applications

Nonvolatile memories especially the ferroelectric (FE)-based ones such as ferroelectric tunnel junctions (FTJs) and ferroelectric field-effect transistors (FeFETs) have recently attracted a lot of attention. FTJs have been intensively researched for the last decade and found to be very promising memory devices due to their significant nondestructive readout advantage as compared to conventional ferroelectric random access memory (FRAM). However, more research is needed on FTJ devices to obtain reliable endurance and retention behavior. In this article, we demonstrate the characteristics and performance of zirconium-doped hafnium oxide-based FTJ devices in terms of FE switching and reliability. This is investigated for FTJ stack structure tuning as well as for the FE switching process in FTJ devices. The FTJ memory switching characteristics, the effects of polarization switching on the write conditions, and the impact of pulse width and pulse amplitude on switching are investigated. The impact of FE layer thickness and interface layer type/thickness are reported to obtain a maximum FTJ I-ON/I-OFF ratio (memory window) and reliable performance. The maximum I-ON/I-OFF ratio changes depending on the FE layer (zirconium-doped HfO2 layer) thickness (12, 8, 6, and 4 nm), the interface layer type (SiO2, Al2O3), and thickness(1 and 2nm), indicating the maximum value of I-ON/I-OFF ratio for a 1 nm SiO2 interface layer stack. Moreover, a stable endurance of 10(4) cycles is reported and extrapolated measurements suggest stable retention for more than ten years. Time-dependent breakdown analysis was performed to investigate the reliability of devices indicating a lifetime of ten years.

Automated summary

This article investigates the characteristics and performance of zirconium-doped hafnium oxide-based ferroelectric tunnel junction (FTJ) devices in terms of ferroelectric (FE) switching and reliability. The switching characteristics of FTJ memory, the effects of polarization switching on write conditions, and the impact of pulse width and amplitude on switching are studied. The results show that the maximum FTJ I-ON/I-OFF ratio and reliable performance can be achieved by tuning the stack structure and FE layer thickness.