期刊
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
卷 68, 期 12, 页码 4862-4875出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2021.3122343
关键词
Memristors; Semiconductor device modeling; Voltage; Switches; Mathematical models; Integrated circuit modeling; Electrodes; EDA tools; hybrid CMOS; memristor; modelling; verification
资金
- EPSRC Programme Grant FORTE [EP/R024642/1, H2020-FETPROACT-2018-01]
- RAEng Chair in Emerging Technologies [CiET1819/2/93]
- EPSRC [EP/R024642/1] Funding Source: UKRI
Memristive technology has seen explosive growth in the past decade, but transitioning it from the lab to the marketplace requires the development of an accessible and user-friendly design flow, supported by an industry-grade toolchain. This study demonstrates the behavior of a custom memristor model fabricated in-house, integrated with Cadence Electronic Design Automation tools for verification.
Memristive technology has experienced explosive growth in the last decade, with multiple device structures being developed for a wide range of applications. However, transitioning the technology from the lab into the marketplace requires the development of an accessible and user-friendly design flow, supported by an industry-grade toolchain. In this work, we demonstrate the behaviour of our in-house fabricated custom memristor model and its integration into the Cadence Electronic Design Automation (EDA) tools for verification. Various input stimuli were given to record the memristive device characteristics both at the device level as well as the schematic level for verification of the memristor model. This design flow from device to industrial level EDA tools is the first step before the model can be used and integrated with Complementary Metal-Oxide Semiconductor (CMOS) in applications for hybrid memristor/CMOS system design.
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