A Dynamically Reconfigurable ECG Analog Front-End With a 2.5 x Data-Dependent Power Reduction

This paper presents a reconfigurable electrocardiogram (ECG) analog front-end (AFE) exploiting bio-signals' inherent low activity and quasi-periodicity to reduce power consumption. This is realized by an agile, on-the-fly dynamic noise-power trade-off performed over specific cardiac cycle regions guided by a least mean squares (LMS)-based adaptive predictor leading to similar to 2.5 x data-dependent power savings. Implemented in 65 nm CMOS, the AFE has tunable performance exhibiting an input-referred noise ranging from 2.38 - 3.64 mu V-rms while consuming 307 - 769 nW from a 0.8 V supply. A comprehensive system performance verification was performed using ECG records from standard databases to establish the feasibility of the proposed predictor-based approach for power savings without compromising the system's anomaly detection capability or ability to extract pristine ECG features.

Automated summary

This paper introduces a reconfigurable ECG analog front-end that reduces power consumption by exploiting the low activity and quasi-periodicity of bio-signals. By performing a dynamic noise-power trade-off, significant data-dependent power savings were achieved. Implemented in 65 nm CMOS, the system maintains tunable performance while improving energy efficiency.