A 51.3-TOPS/W, 134.4-GOPS In-Memory Binary Image Filtering in 65-nm CMOS

Neuromorphic vision sensors (NVSs) can enable energy savings due to their event-driven that exploits the temporal redundancy in video streams from a stationary camera. However, noise-driven events lead to the false triggering of the object recognition processor. Image denoise operations require memory-intensive processing leading to a bottleneck in energy and latency. In this article, we present in-memory filtering (IMF), a 6T-SRAM in-memory computing (IMC)-based image denoising for event-based binary image (EBBI) frame from an NVS. We propose a non-overlap median filter (NOMF) for image denoising. An IMC framework enables hardware implementation of NOMF leveraging the inherent read disturb phenomenon of 6T-SRAM. To demonstrate the energy-saving and effectiveness of the algorithm, we fabricated the proposed architecture in a 65-nm CMOS process. Compared to fully digital implementation, IMF enables >70x energy savings and a >3x improvement of processing time when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 134.4 GOPS. Furthermore, the peak energy efficiencies of the NOMF are 51.3 TOPS/W, comparable with state-of-the-art in-memory processors. We also show that the accuracy of the images obtained by NOMF provides comparable accuracy in tracking and classification applications compared with images obtained by conventional median filtering.

Automated summary

This article introduces an in-memory filtering technology that utilizes 6T-SRAM in-memory computing for image denoising, improving processing efficiency and energy savings. The new technology demonstrates excellent energy-saving performance while maintaining high algorithm accuracy and has promising application prospects.