4.6 Article

A Compact 0.2-0.3-V Inverse-Class-F23 Oscillator for Low 1/f3 Noise Over Wide Tuning Range

期刊

IEEE JOURNAL OF SOLID-STATE CIRCUITS
卷 57, 期 2, 页码 452-464

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2021.3098770

关键词

Class-C oscillator; digitally controlled oscillator (DCO); Internet-of-Things (IoT); low flicker phase noise (PN); low power; low voltage; narrow conduction angle; transformer; vertical integration

资金

  1. Analog Devices, Cork, Ireland
  2. Science Foundation Ireland [14/RP/I2921]

向作者/读者索取更多资源

A new oscillation mode, inverse class-F-23, is introduced in an LC-tank, presenting low resistive impedances at both second and third harmonics achieved by a tight magnetic coupling in differential and common modes. The proposed digitally controlled oscillator in 28nm CMOS achieves high performance with improved phase noise characteristics due to the reduction of harmonics and conduction angle narrowing. The use of a 2:3 transformer provides high gain and reduces area by 30%, resulting in a record figure-of-merit (FoM) within a low supply voltage and power constraint.
We introduce a new mode of oscillation in an LC-tank: an inverse class-F-23. In contrast to the conventional class-F oscillators, in which a high value of the real impedance (i.e., resistance) is presented to the third (in class-F-3) or/and to the second (in class-F-2/class-F-23) oscillator harmonics via an auxiliary resonance, here low resistive impedances (resembling a non-ideal short) are presented at both the second and third harmonics. This is made possible by tight magnetic coupling in the differential and common modes, respectively, afforded by a new compact 2:3 transformer. Being largely free from the harmonics in the voltage waveform and their possible deleterious phase shift effects on the flicker noise up-conversion, the phase noise performance in the flicker and thermal regions is further improved by narrowing the conduction angle. The 2:3 step-up transformer also provides a high passive gain to help with the startup in face of low supply. The switched-capacitor banks and cross-coupled transistor pair are carefully integrated under the transformer with a special arrangement of native (high-resistivity) substrate layer to mitigate their effect on the oscillation while reducing the area by 30%. The proposed digitally controlled oscillator (DCO) is implemented in 28-nm CMOS and achieves -95 dBc/Hz and -118 dBc/Hz at 100 kHz and 1 MHz offsets, respectively, while operating at a 0.3 V supply. The measured 1/f(3) corner stays within 60 to 100 kHz over the 35% tuning range (TR) (from 2.02 to 2.87 GHz). This results in a figure-of-merit (FoM) with normalized TR (FoM(T)) of -196 and -199 dB at 100 kHz and 1 MHz offsets, respectively, is a record in the space of <= 0.5 V and <= 1 mW.

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