Sn Concentration Effects on Polycrystalline GeSn Thin Film Transistors

Thin-film transistor (TFT) applications of GeSn have attracted attention as a means of improving the performance of electronic devices. Based on our advanced solid-phase crystallization and TFT process technologies, we comprehensively studied the relationship between the film properties and TFT characteristics of polycrystalline GeSn. The initial Sn concentration x(i) significantly changed the crystal and electrical properties of the GeSn layer. Excess Sn (x(i) >= 4.5%) precipitated in GeSn and degraded its properties, whereas the appropriate amount of Sn effectively passivated defects in Ge and reduced the density of defect-induced acceptors and grain boundary traps while maintaining a high Hall hole mobility (>200 cm(2) V-1 s(-1)). The performance of the accumulation-mode TFTs fabricated under 400 degrees C also strongly depended on x(i), achieving both a high field-effect mobility (170cm(2) V-1 s(-1)) and on/off ratio (10(3)) at x(i) = 1.6%. This performance was shown to be the highest among Ge-based TFTs with grain boundaries in the channel.

Automated summary

Thin-film transistor (TFT) applications of GeSn have attracted attention due to their ability to improve electronic device performance, with the appropriate amount of Sn effectively passivating defects in Ge and reducing the density of defect-induced acceptors and grain boundary traps to achieve a high Hall hole mobility (>200 cm(2) V-1 s(-1)). The performance of accumulation-mode TFTs fabricated under 400 degrees C strongly depended on the initial Sn concentration x(i), achieving both a high field-effect mobility (170 cm(2) V-1 s(-1)) and on/off ratio (10(3)) at x(i) = 1.6%. This performance was shown to be the highest among Ge-based TFTs with grain boundaries in the channel.