4.6 Article

Transient Tap Couplers for Wafer-Level Photonic Testing Based on Optical Phase Change Materials

期刊

ACS PHOTONICS
卷 8, 期 7, 页码 1903-1908

出版社

AMER CHEMICAL SOC
DOI: 10.1021/acsphotonics.1c00374

关键词

optical phase change materials; tap couplers; photonic integrated circuits; wafer-scale testing; directional coupler; insertion loss

资金

  1. Defense Advanced Research Projects Agency through the Young Faculty Award Program [D18AP00070]
  2. Assistant Secretary of Defense for Research and Engineering under Air Force [FA8721-05-C-0002, FA8702-15-D-0001]
  3. Secretary of Defense for Research and Engineering under Air Force [FA8702-15-D-0001]

向作者/读者索取更多资源

Wafer-level testing is crucial for monitoring and understanding photonic integrated circuits (PICs), with waveguide tap couplers typically used for testing access. A transient tap coupler design based on optical phase change materials enables broadband testing of PICs with minimal residual loss, offering a compact, broadband, and low-loss solution for wafer-level photonic testing.
Wafer-level testing is crucial for process monitoring, post-fabrication trimming, and understanding system dynamics in photonic integrated circuits (PICs). Waveguide tap couplers are usually used to provide testing access to the PIC components. These tap couplers however incur permanent parasitic losses, imposing a trade-off between PIC performance and testing demands. Here we demonstrate a transient tap coupler design based on optical phase change materials (O-PCMs). In their as-fabricated on state, the couplers enable broadband interrogation of PICs at the wafer level. Upon completion of testing, the tap couplers can be turned off with minimal residual loss (0.01 dB) via a simple low-temperature (280 degrees C) wafer-scale annealing process. We further successfully demonstrated transient couplers in both Si and SiN photonics platforms. The platform-agnostic transient coupler concept uniquely combines compact footprint, broadband operation, exceptionally low residual losses, and low thermal budget commensurate with post-fabrication treatment, thereby offering a facile solution to wafer-level photonic testing without compromising the final PIC performance.

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