4.7 Article

High thermal durability of Ru-based synthetic antiferromagnet by interfacial engineering with Re insertion

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SCIENTIFIC REPORTS
卷 11, 期 1, 页码 -

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NATURE PORTFOLIO
DOI: 10.1038/s41598-021-94640-4

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  1. Ministry of Science and Technology of Taiwan [109-2218-E-007-018-, 110-2218-E-007-034-]
  2. Solar Applied Materials Technology Corporation on sputtering targets

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Synthetic antiferromagnets with Ru/Re composite spacers exhibit superior thermal stability and coupling strength, enhancing the compatibility of back-end of line process and perpendicular magnetic tunneling junctions. Through interfacial engineering, the performance of SAFs can be fine-tuned to enhance the process compatibility of P-MTJs to the CMOS process.
Synthetic antiferromagnets (SAFs), composed of Ru spacer with a Re insertion layer, reveal superior thermal stability up to 450 degrees C annealing, making the back-end of line process a wider manufacturing window and tolerance to integrate the perpendicular magnetic tunneling junctions (P-MTJs) into CMOS process. The coupling strength decays significantly for SAFs with single Ru spacer after annealing above 400 degrees C. Due to the characteristics of refractory metals, Re can behave as a diffusion barrier during annealing. Furthermore, the Re spacer can still keep reasonable RKKY coupling strength. Therefore, the SAFs with Ru/Re composite spacers exhibit higher RKKY coupling strength than Ru spacers after 450 degrees C annealing. In addition, we discovered the different enhancements for the upper and lower interfacial Re insertion, which was attributed to the varied defect formation at interfaces. The stacking fault was formed at the upper Ru/Co interface in as-deposited state. When Re was inserted at the upper interface, the diffusion between Co and Ru was significantly suppressed and the stacking fault can be eliminated during annealing, leading to enhanced interlayer coupling. Through the interfacial engineering, we may have more degrees of freedom to tune the SAF performance and thus enhance process compatibility of P-MTJ to the CMOS process.

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