Shadow-wall lithography of ballistic superconductor-semiconductor quantum devices

The realization of hybrid superconductor-semiconductor quantum devices, in particular a topological qubit, calls for advanced techniques to readily and reproducibly engineer induced superconductivity in semiconductor nanowires. Here, we introduce an on-chip fabrication paradigm based on shadow walls that offers substantial advances in device quality and reproducibility. It allows for the implementation of hybrid quantum devices and ultimately topological qubits while eliminating fabrication steps such as lithography and etching. This is critical to preserve the integrity and homogeneity of the fragile hybrid interfaces. The approach simplifies the reproducible fabrication of devices with a hard induced superconducting gap and ballistic normal-/superconductor junctions. Large gate-tunable supercurrents and high-order multiple Andreev reflections manifest the exceptional coherence of the resulting nanowire Josephson junctions. Our approach enables the realization of 3-terminal devices, where zero-bias conductance peaks emerge in a magnetic field concurrently at both boundaries of the one-dimensional hybrids. Advanced fabrication techniques enable a wide range of quantum devices, such as the realization of a topological qubit. Here, the authors introduce an on-chip fabrication technique based on shadow walls to implement topological qubits in an InSb nanowire without fabrication steps such as lithography and etching.

Automated summary

The study presents an on-chip fabrication technique based on shadow walls to implement topological qubits in an InSb nanowire without the need for fabrication steps such as lithography and etching. This advancement enables the realization of hybrid superconductor-semiconductor quantum devices, ultimately leading to the implementation of topological qubits.