T-Count Optimized Wallace Tree Integer Multiplier for Quantum Computing

Quantum circuits for performing an arithmetic operation are necessary for the implementation of quantum computing peripherals. An effective quantum circuit can be developed using a minimum amount of Clifford + T gates, as the implementation of Clifford + T quantum gates is more expensive than the other quantum gates. A quantum full adder (QFA) circuit for quantum computing hardware is proposed in this work. The proposed QFA circuit is optimized for T-count using a single CCNOT (Toffoli) gate. This work also focuses on implementing a quantum integer multiplication circuit using the proposed QFA to achieve better T-count savings than the existing counterparts.

Automated summary

This study proposes a QFA circuit for quantum computing hardware, optimized to reduce T-count using a single CCNOT (Toffoli) gate. It also focuses on implementing a quantum integer multiplication circuit using the QFA to achieve better T-count savings than existing counterparts.