期刊
IEEE TRANSACTIONS ON POWER ELECTRONICS
卷 36, 期 9, 页码 10612-10626出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2021.3059574
关键词
Capacitor voltage oscillation suppression; five-level NNPP converter; multilevel converters; neutral-point potential balance; seven-segment space vector pulsewidth modulation (SVPWM)
资金
- National High Technology Research and Development Program of China [2014AA052602]
- Key Research and Development Program of Hebei Province [19214504D]
The article introduces a dynamic-segment-alternating SVPWM (DSA-SVPWM) based on a five-level nested NP piloted converter, which effectively balances the NP potential and reduces harmonic distortions, showing good generalization ability.
The neutral-point (NP) potential balance has always been an essential issue for multilevel converters. In this article, the primary cause of the NP potential deviation using seven-segment space vector pulse width modulation (SVPWM) is theoretically revealed. A dynamic-segment-alternating SVPWM (DSA-SVPWM) based on a five-level nested NP piloted converter is proposed, which can effectively balance the NP potential, suppress capacitor voltage oscillations and reduce harmonic distortions. The performance is observed with different power factors and modulation indexes, and the steady state and transient responses are analyzed. The conduction loss and switching loss of the converter are studied. The loss distributions among switching devices are also presented. The proposed DSA-SVPWM is simple to implement with good generalization ability, which allows it to be applied to converters of other topologies and levels. Simulations and experiments are performed to verify the method's effectiveness and practicality.
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