4.5 Article

MPV-Parallel Readout Architecture for the VME Data Acquisition System

期刊

IEEE TRANSACTIONS ON NUCLEAR SCIENCE
卷 68, 期 8, 页码 1841-1848

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNS.2021.3083832

关键词

Field programmable gate arrays; Data acquisition; Backplanes; Computer architecture; Connectors; Clocks; Throughput; Data acquisition; field-programmable gate array (FPGA); nuclear physics; parallel readout; VERSA Module Eurocard (VME) bus

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The MPV system utilizes a parallel readout architecture with a maximum data throughput of 400 Mbps, which can significantly enhance the performance of VME data acquisition systems.
Mountable controller with parallelized VERSA Module Eurocard (VME) (MPV) is a VME-compatible system having a parallel readout architecture. This article presents the system architecture and its data acquisition performance. In this system, the readout sequence is implemented in a field-programmable gate array (FPGA) to achieve the ideal VME bus speed. Data from multiple VME slave modules are read out in parallel, merged, and sent to a server. Maximum data throughput of 400 Mbps was achieved. Thus, the MPV system can dramatically improve the performance of VME data acquisition systems.

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