Electrical Characteristics and Reliability of Wafer-on-Wafer (WOW) Bumpless Through-Silicon Via

Electrical characteristics and reliability of the wafer-on-wafer (WOW) bumpless through-silicon via (TSV) structure are investigated, and the new lumped circuit model is proposed to simulate the performance of the structure. Including the actual contact resistance in the model, the integrity of the high-frequency signal can be accurately simulated. For the 12-layer stacked bumpless TSV structure with plasma cleaning at the via bottom, the transmission loss of the signal up to 20 GHz can be lower than 2 dB. High eye height and low jitter at 3.2 Gbps show excellent signal integrity for high bandwidth memory (HBM) applications. In addition, a complete reliability study, including thermal cycling test (TCT), highly accelerated stress test (HAST), and electromigration test, reveals excellent electrical and mechanical properties, indicating that the structure is robust with great potential for 3-D integration.

Automated summary

The electrical characteristics and reliability of the wafer-on-wafer (WOW) bumpless through-silicon via (TSV) structure were investigated and a new lumped circuit model was proposed to simulate its performance. The 12-layer stacked bumpless TSV structure showed low transmission loss and excellent signal integrity. A complete reliability study revealed excellent electrical and mechanical properties, indicating great potential for 3-D integration.