Low-Temperature Deep Ultraviolet Laser Polycrystallization of Amorphous Silicon for Monolithic 3-Dimension Integration

Monolithic 3-dimensional integration (M3D) requires heat treatment techniques that should not degrade the device performance of the lower layers when applied to device fabrication in the upper layers. Deep ultraviolet (DUV) laser annealing was implemented in the crystallization of amorphous silicon and source/drain junction activation to fabricate polycrystalline silicon (poly-Si) metal-oxide-semiconductor field-effect-transistors (MOSFETs) for upper-layer devices. The poly-Si MOSFET devices were fabricated successfully on top of the bottom electronic circuit layer (isolated by a thick silicon dioxide layer). Devices on the upper and lower layers were connected through interlayer vias to form a current-starved ring oscillator. The current-to-frequency converter on the bottom layer showed a reasonable increase in frequency as the current of the poly-Si MOSFET on the upper layer increased with increasing silicon grain size, confirming that DUV laser annealing did not degrade the performance of the bottom layer devices. This opens more opportunities for using DUV laser annealing in the M3D integration.

Automated summary

This study successfully utilized deep ultraviolet laser annealing to fabricate upper-layer poly-Silicon devices without degrading the performance of lower-layer devices. By connecting upper and lower layer devices through interlayer vias, a current-starved ring oscillator was formed, showing a reasonable performance improvement in the bottom layer circuits.