期刊
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY
卷 11, 期 4, 页码 573-578出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCPMT.2021.3069085
关键词
Bonding; Passivation; Surface treatment; Surface roughness; Rough surfaces; Grain size; Atomic layer deposition; 3-D integration; Cu bonding; low-temperature bonding
类别
资金
- Center for the Semiconductor Technology Research from The Featured Areas Research Center Program within Ministry of Education (MOE) in Taiwan
- Ministry of Science and Technology, Taiwan [MOST 109-2634-F-009-029, MOST 109-2639-E-009-001, MOST 109-2221-E-009-023-MY3, MOST 109-2622-8-009-010-TC]
The use of Pt as a metal passivation material enables low-temperature Cu-Cu direct bonding with good bonding surface and strength. Cu atoms diffuse through the passivation layer to form a new layer without pretreatment, making it suitable for 3-D integrated circuits and heterogeneous integration.
Pt has been investigated as a metal passivation material to achieve low-temperature Cu-Cu direct bonding process. With 10-nm Pt passivation layer capping on Cu surface, a good bonding surface with no oxides and small grain size can be obtained. During the low-temperature bonding process, Cu atoms diffuse through the passivation layer and form a new layer without any pretreatment. This bonding scheme with Pt passivation layer provides a solution for Cu low-temperature bonding, with excellent bonding strength, good electrical performance, and ability to endure temperature variation. In addition, both chip- and wafer-level bonding process have been successfully demonstrated, showing a high potential to be applied on 3-D integrated circuit (IC) and heterogeneous integration.
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