期刊
IEEE TRANSACTIONS ON POWER ELECTRONICS
卷 36, 期 5, 页码 5362-5370出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2020.3027663
关键词
Logic gates; MOSFET; Capacitance; Integrated circuit modeling; Inductance; Switches; Oscillators; Gate ringing; power MOSFET; superjunction
资金
- ON Semiconductor Corporation
As superjunction devices are scaled down to smaller dimensions, gate ringing becomes more prominent in dynamic switching. This article finds that gate ringing is highly related to input capacitance, with the gate ringing highly dependent on the sum of input capacitances for turn-on, and affected by the ratio of input capacitances for turn-off, where a lower C-GS is desirable for reducing gate oscillation.
As superjunction devices are scaled down to smaller dimensions, the gate ringing becomes more prominent in dynamic switching. The exact origin of superjunction MOSFET's gate ringing has not been so far identified as the conventional three-terminal measurement method cannot capture the dynamic behavior of the device, in particular the redistribution of charge between the different internal capacitive components in the superjunction structure. In this article, it is found that the gate ringing is highly related to the input capacitance. Specifically, by employing a TCAD model with a split gate method, the gate-to-source (C-GS) and gate-to-drain (C-GD) current are investigated during the dynamic transitions. The gate ringing is highly dependent on sum of the input capacitances (C-GS + C-GD) for the turn-on. In the case of the turn-off, however, the gate ringing is affected by the ratio of the input capacitances (C-GD/C-GS) and a lower C-GS is desirable for a low gate oscillation.
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