期刊
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS
卷 57, 期 2, 页码 1559-1571出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIA.2020.3046703
关键词
Inductors; Capacitors; Windings; Buck converters; Switches; Stress; Inductance; Buck converter; coupled-inductor; current ripple; step-down ratio; voltage ripple
资金
- Ministry of Electronics and Information Technology, Government of India
This article introduces the design principle and application of a buck converter with a large step-down voltage conversion ratio, reduced ripple in inductor current, and low semiconductor voltage stress. The converter modifies the conversion ratio by a series-parallel transition of two identical capacitors, and uses directly coupled inductors to reduce ripple in inductor currents and output voltage.
This article presents a buck converter with a large step-down voltage conversion ratio, reduced ripple in inductor current and low semiconductor voltage stress. The proposed converter produces a lower output voltage at a sufficiently higher duty ratio compared to the conventional buck converter. The step-down voltage conversion ratio is modified by a series-parallel transition of two identical capacitors of a switch-capacitor cell. Two parallelly placed switches and two cross-connected identical capacitors are utilized to design the cell. An extra inductor is placed at the input side to oppose the sudden change in input current due to the series-parallel transition of the two identical capacitors. Therefore, two inductors are required to design the converter. These two inductors are coupled directly. The modified voltage conversion ratio reduces the ripple in inductor currents and output voltage. Direct coupling between the two inductors helps to further reduce the ripple in inductor currents and output voltage. The operating principle, analysis of ripple in inductor currents, and ripple in output voltage are discussed. The analysis of small-signal modeling is carried out and a voltage mode PI-controller is designed to enable the closed-loop operation. Finally, the proposed converter is implemented in hardware and the performance of the proposed converter is verified experimentally.
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