Modeling of Repeated FET Hot-Carrier Stress and Anneal Cycles Using Si-H Bond Dissociation/Passivation Energy Distributions

We report measurements of multiple hot-carrier (HC) stress and high-temperature anneal cycles repeated on the same nFETs fabricated in a commercial 40-nm bulk CMOS technology. We model this cycled HC degradation anneal assuming Si-H bond breakage during stress and bond passivation during anneal, with the bond dissociation and passivation energies following a bivariate Gaussian distribution. Our model can describe multiple stress and anneal time scenarios well using a single parameter set and provides insights into the recovery behavior of HC-induced defects. We find no correlation between bond dissociation and passivation energies and observe that the repeated HC stress and anneal cycles suppress the low energies from the distribution of bond passivation energies, changing its shape from the Gaussian to a non-Gaussian form.

Automated summary

This study presents measurements of multiple hot-carrier stress and high-temperature anneal cycles on the same nFETs in a commercial 40-nm bulk CMOS technology. It models the degradation anneal process assuming Si-H bond breakage during stress and bond passivation during anneal, with the bond dissociation and passivation energies following a bivariate Gaussian distribution. The research finds no correlation between bond dissociation and passivation energies, and notes that repeated HC stress and anneal cycles change the shape of the distribution of bond passivation energies from Gaussian to non-Gaussian.