Analytical Surface Potential-Based Compact Model for Independent Dual Gate a-IGZO TFT

A surface potential-based compact model for independent dual gate (IDG) amorphous In-Ga-Zn-O thin-film transistors (IDG a-IGZO TFTs) is proposed here. The transport theories of percolation conduction, trap-limited conduction (TLC), and variable range hopping (VRH) in extended and localized states are first considered simultaneously via Schroder method, obtaining a physical description of the transport mechanism under different conditions of temperature and gate voltage. Moreover, a single formulation of front and back surface potentials which is valid and extremely accurate in all operation regimes is developed. Based on the transport theories and surface potentials, the complete compact model is developed and verified using both numerical simulation and experiment with an excellent agreement, and the threshold compensation effect is also included. Finally, the compact model is coded in Verilog-A, and implemented in a vendor CAD environment, which suggested that the proposed model can be successfully applied to circuit design.

Automated summary

A surface potential-based compact model for IDG a-IGZO TFTs is proposed in this study, considering percolation conduction, trap-limited conduction, and variable range hopping transport theories. A single formulation of front and back surface potentials is developed, which is valid and accurate in all operation regimes. The compact model is verified through numerical simulation and experiment, showing excellent agreement and applicability for circuit design.