期刊
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
卷 137, 期 -, 页码 -出版社
ELSEVIER GMBH
DOI: 10.1016/j.aeue.2021.153800
关键词
Ultra-low power; VPTAT generator; Subthreshold; Voltage reference; Implantable device
资金
- Spanish government (MINECO/FEDER) [RTI2018-097088-B-C32, RTI2018-095994-B-I00]
- Conselleria de Cultura, Educacion e Ordenacion Universitaria [ED431G/08, ED431C 2017/69]
- Junta de Extremadura [IB18079]
- European Regional Development Fund (ERDF)
The circuit presented is a small size, low-power voltage generator for implantable applications based on a PTAT cell, featuring self-cascode and self-biased design. It uses a cutoff transistor to determine biasing current and keeps self-cascode cells in the subthreshold region, eliminating the need for dedicated startup circuitry. All transistors are regular threshold voltage devices to reduce the impact of process variations on performance. The circuit has been fabricated in standard CMOS 180 nm technology, consuming a total power of 152 pW at an average human body temperature of 36 degrees C, with a minimum supply voltage of 0.6 V and a total layout area of only 1060 square micrometers.
A small size, low-power, self-cascode and self-biased voltage generator based on a PTAT cell for implantable applications is presented. The approach can be extended to other constant temperature applications. A cut-off transistor is used to determine the biasing current and keep the self-cascode cells in the subthreshold region, thus avoiding the use of dedicated startup circuitry. All the transistors are regular threshold voltage devices in order to reduce the impact of process variations on the overall performance. The proposed circuit has been fabricated in a standard CMOS 180 nm technology and the measured total power consumption at an average human body temperature of 36 degrees C is 152 pW, with a minimum supply voltage of 0.6 V and a total layout area of only 1060 mu m(2).
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