4.6 Article

Four-Bits-Per-Memory One-Transistor-and-Eight-Resistive-Random-Access-Memory (1T8R) Array

期刊

IEEE ELECTRON DEVICE LETTERS
卷 42, 期 3, 页码 335-338

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2021.3055017

关键词

Transistors; Programming; Decoding; Metals; Voltage control; System-on-chip; Nonvolatile memory; 4-bits-per-RRAM; gradual-SET; RESET; RRAM

资金

  1. Defense Advanced Research Projects Agency (DARPA) 3DsoC Program
  2. Ministry of Science and Technology (MOST), Taiwan [1092636E008007]

向作者/读者索取更多资源

In this research, a 1MBit array of 1-Transistor-8-Resistive RAM (1T8R) memory was demonstrated using a foundry logic technology. By employing a gradual SET/RESET programming scheme, sixteen conductance levels are stored in each RRAM, achieving a 1T8R array with 4 bits per RRAM. The study reported SET/RESET endurance of 100K cycles and 10-year retention at 110 degrees C.
We demonstrate a 1MBit array of 1-Transistor-8-Resistive RAM (1T8R) memory fabricated using a foundry logic technology. Using a gradual SET/RESET programming scheme, sixteen conductance levels are stored in each RRAM, achieving 1T8R array with 4 bits per RRAM. We report SET/RESET endurance of 100K cycles and 10-year retention at 110 degrees C.

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