2D Semiconductor Transistors with Van der Waals Oxide MoO3as Integrated High-κ Gate Dielectric

The search for smaller electronic and optoelectronic devices is a leading research towards atomically thin graphene-like 2D semiconductor materials. Due to the decreasing size and unique van der Waals (vdW) nature of these 2D semiconductors, there is an imperative need to find compatible gate dielectrics that can enable high gate coupling efficiency and seamless integration with these materials. One possible approach is to identify and utilize 2D vdW oxides with high dielectric constants, kappa, similar to the integration of high-kappa dielectrics HfO(2)and ZrO2. To this end, MoO(3)is an attractive transition metal oxide candidate for gate dielectrics in 2D field effect transistors (FETs) due to its vdW structure in addition to its high dielectric constant measured in the bulk. This study demonstrates that as-grown MoO(3)has a high dielectric constant, kappa, of approximate to 35 at room temperature at low frequencies by fabricating parallel plate capacitors from these thin flakes. Most importantly, mechanically exfoliated MoO(3)nanoflakes are used to create heterostructures with WSe(2)and a top-gate WSe2/MoO(3)heterostructure FET is demonstrated, showing the potential of MoO(3)as a promising high-kappa 2D vdW gate dielectric.