4.8 Article

Desynchronizing Paralleled GaN HEMTs to Reduce Light-Load Switching Loss

期刊

IEEE TRANSACTIONS ON POWER ELECTRONICS
卷 35, 期 9, 页码 9151-9170

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2020.2970240

关键词

Commutation inductors; desynchronized parallel; light-load efficiency; parallel of GaN high-electron-mobility transistors (HEMTs); switching loss; zero-voltage switching (ZVS)

资金

  1. UK Engineering and Physical Sciences Research Council (EPSRC) [EP/R036799/1]
  2. EPSRC [EP/R036799/1] Funding Source: UKRI

向作者/读者索取更多资源

Parallel connection of GaN high-electron-mobility transistors (HEMTs) is a more cost-effective or even an unavoidable solution to achieve higher current ratings. As the load decreases, the switching loss of paralleled HEMTs becomes dominant over the conduction loss, and the overall power conversion efficiency drops sharply. To reduce the light-load switching loss, this article proposes a desynchronizable paralleling scheme. The midpoint (ac terminal) of each paralleled HEMT half bridge is connected with a commutation inductor, which thus, enables two operation modes-synchronous and asynchronous modes. The synchronous modeis activated at heavy loads to share the high current; the added commutation inductors lead to better current sharing than the direct parallel. When operating at light loads, however, the paralleled devices are desynchronized to generate a circulating current flowing through the commutation inductors. The circulating current enables the lagging HEMTs to achieve the zero-voltage switching and allows the leading ones to turn ON at a current lower than the load, thereby significantly reducing the total switching loss. In addition, a thermal balancing scheme is proposed to alleviate the thermal stress imbalance between the desynchronized GaN HEMTs. The operating principle and design guidelines of the desynchronizable paralleling scheme are detailed. Finally, experimental results from multipulse and continuous tests of GaN HEMTs are provided to verify the advantages of the proposed paralleling scheme in reducing light-load switching loss and improving light-load efficiency.

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