期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 67, 期 10, 页码 3954-3959出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2020.3013242
关键词
Logic gates; Threshold voltage; FinFETs; Pulse measurements; Voltage measurement; Gallium; FinFET; Ga2O3; gate stability; trapping; vertical transistor
资金
- University of Padova through the Novel vertical GaN-devices for next generation power conversion, NoveGaN project, STARS CoG Grants
- AFOSR [FA9550-17-1-0048, FA9550-18-1-0529]
- NSF NNCI Program [ECCS-1542081]
- MRSEC [DMR-1719875]
- MRI [DMR-1338010]
We present a detailed investigation of the trapping and detrapping mechanisms that take place in the gate region of beta-Ga2O3 vertical finFETs and describe the related processes. This analysis is based on combined pulsed characterization, transient measurements, and tests carried out under monochromatic light, with photon energies between 1.5 and 5 eV. The original results presented in this article demonstrate that: (i) when submitted to positive gate stress with V-GS > V, the devices show a significant threshold voltage variation; (ii) this effect is not recoverable in 10 000 s in rest condition (zero bias, dark condition). (iii) V-TH can quickly recover its initial value when the device is illuminated with UV-C light at 280 nm. (iv) Stress-recovery experiments carried out at different photon energies allowed us to estimate the threshold energy for the release of carriers from the Al2O3/Ga2O3 interface, and for the injection of electrons from metal to the Al2O3 insulator (conduction band discontinuity at the metal/Al2O3 interface).
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