期刊
JOURNAL OF PHYSICS D-APPLIED PHYSICS
卷 53, 期 40, 页码 -出版社
IOP PUBLISHING LTD
DOI: 10.1088/1361-6463/ab9918
关键词
low-temperature polycrystalline-silicon thin-film transistor; dual sweep operation; abnormal hump; hysteresis
资金
- Ministry of Science and Technology, Taiwan (MOST) [MOST-106-2112-M-110-008-MY3, 107-2221-E-009-097-MY2]
Degradation in low-temperature polycrystalline-silicon thin-film transistors after electrical stress was thoroughly investigated in this work. Main channel degradation, abnormal hump generation and hysteresis appearing in the hump region can be observed after positive bias stress. Furthermore, the difference in subthreshold swing (SS) values between forward/reverse sweep is observed. The electron trapping into the gate insulator (GI) dominates the main degradation and the hump generation. Additionally, the difference in SS values which appears in the hump region is attributed to the interface traps and the hysteresis is caused by electron trapping/detrapping into GI.
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