期刊
IEEE ELECTRON DEVICE LETTERS
卷 41, 期 6, 页码 860-863出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2020.2990701
关键词
Carbon nanotubes; double-gate FETs; solution process; stability; thin film transistors
资金
- National Research Council of Science and Technology (NST), South Korea, through the Research and Development Convergence Program [CAP-15-04-KITECH]
In this letter, we improved the stability of all-inkjet-printed carbon nanotube thin film transistors (CNT TFTs) by employing a double gate (DG) structure under an optimal bias condition. In the single-gate structure, the positive threshold voltage (VTH) shift under 10 V positive gate bias stress (PGBS) was significantly reduced with poly(4-vinylphenol) passivation. However, after 100 s, the on-current level was decreased, and a large negative VTH shift was observed. We adopted DG CNT TFTs for a further improvement. When-3V was applied to the top gate, the DG CNT TFTs not only exhibited a much lower VTH shift but also showed a stabilized on-current level. When an appropriate bias is applied to the top gate, charge trapping is induced at the top gate interface and it might balance between the positive and negative shifts. As a result, the overall stress effect is reduced. The p-type only inverter adopting a DG CNT TFT showed improved stability under -3 V of top gate bias. Our experimental result shows that DG structure is a promising candidate for various CNT circuit designs.
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