4.3 Article

Fast and Accurate Edge Computing Energy Modeling and DVFS Implementation in GEM5 Using System Call Emulation Mode

出版社

SPRINGER
DOI: 10.1007/s11265-020-01544-z

关键词

DVFS; GEM5; System call emulation; Edge computing; Embedded systems; Energy model; System scenario

资金

  1. NTNU Norwegian University of Science and Technology (incl St. Olavs Hospital - Trondheim University Hospital)

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This paper presents a non-intrusive application controlled DVFS management implementation in the GEM5 simulator and a novel architecture independent energy model. By parametrizing and calibrating the energy model, and combining it with GEM5 output statistics, we successfully estimate the total energy consumption of the simulated system accurately.
Stringent power budgets in battery powered platforms have led to the development of energy saving techniques such as Dynamic Voltage and Frequency scaling (DVFS). For embedded system designers to be able to ripe the benefits of these techniques, support for efficient design space exploration must be available in system level simulators. The advent of the edge computing paradigm, with power constraints in the mW domain, has rendered this even more essential. Without a fast and accurate methodology for architecture simulation and energy estimation, the benefit of new ideas and solutions cannot be evaluated. In this paper, we propose a non-intrusive application controlled DVFS management implementation in the GEM5 simulator, used with GEM5's system call emulation mode. We also propose a novel architecture independent energy model based on categorization of different measurable workload classes. Our energy model is parametrized and calibrated with power measurements on a SAM4L microcontroller board, containing an ARM Cortex M4 processor. Together with the GEM5 output statistics, the model accurately estimates the total energy consumption of our simulated system. The results from our modified GEM5 simulator are validated with representative signal processing applications. After correction of systematic offset errors, our results deviate with less than 4% compared to measurements from the SAM4L microcontroller. Our contributions in this paper can easily be tailored to other processor models in GEM5 and to future versions of GEM5. It will therefore enable system architects to explore new techniques and compare the improvements relative to existing architectures.

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