4.1 Article

Four-stage CMOS amplifier: frequency compensated using differential block

期刊

IET CIRCUITS DEVICES & SYSTEMS
卷 14, 期 6, 页码 762-769

出版社

INST ENGINEERING TECHNOLOGY-IET
DOI: 10.1049/iet-cds.2019.0517

关键词

circuit simulation; frequency response; CMOS integrated circuits; transfer functions; capacitors; differential amplifiers; matrix algebra; differential block; simple frequency compensation technique; differential feedback stage; single Miller capacitor; frequency compensation network; matrix description; analytical transfer function; compensation capacitor; gain bandwidth; phase margin values; TSMC CMOS technology; frequency response; four-stage CMOS amplifier; low die occupation; HSPICE circuit simulator; size 0; 18 mum

向作者/读者索取更多资源

Simple and efficient frequency compensation technique for a four-stage amplifier is presented in this study. Using a differential feedback stage and a single Miller capacitor on its output, the frequency compensation network is formed. The proposed configuration is described via matrix description. Meanwhile, an analytical transfer function is calculated. The proposed amplifier demonstrates low die occupation because of the small value of the compensation capacitor while shows acceptable frequency response regarding gain bandwidth and phase margin values. In addition, the design procedure is simple compared to the previous state-of-the-art. The HSPICE circuit simulator and TSMC 0.18 mu m CMOS technology were exploited to verify theoretical presentation.

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

4.1
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据