期刊
IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS
卷 56, 期 2, 页码 1163-1171出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TAES.2019.2925448
关键词
Harsh radiation; radiation-hardening-by-design; self-recoverability; soft error; triple-node upset (TNU)
资金
- National Natural Science Foundation of China [61604001, 61834006, 61874156, 61674048, 61872001, 61974001, 61572031]
- Anhui University Doctor Startup Fund [Y040435009]
- China Scholarship Council
- JSPS [17H01716]
- Grants-in-Aid for Scientific Research [17H01716] Funding Source: KAKEN
In harsh radiation environments, nanoscale CMOS latches have become more and more vulnerable to triple-node upsets (TNUs). This paper first proposes a latch design that can self-recover from any possible TNU for aerospace applications in the 16-nm CMOS technology. The proposed latch is mainly constructed from seven mutually feeding-back soft-error-interceptive modules (SIMs), any of which consists of two three-input C-elements and one two-input C-element. Due to the mutual feedback mechanism of SIMs and the dual-level soft-error interception of each SIM, the latch can self-recover from any possible TNU. Simulation results demonstrate the TNU self-recoverability from any key TNU for the proposed latch using redundant silicon area. Furthermore, using a high-speed path, the proposed latch saves about 95.45% transmission delay and 86.97% delay-power-area product, compared with the state-of-the-art TNU-tolerant latch that cannot provide complete TNU self-recoverability at all.
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