A 1770-μm2 Leakage-Based Digital Temperature Sensor With Supply Sensitivity Suppression in 55-nm CMOS

This article presents a leakage-based digital temperature sensor with reduced supply sensitivity for on-chip thermal management. The sensor, featured with a novel supply sensitivity suppression mechanism, performs the temperature-to-frequency conversion by a leakage-dominated ring oscillator (LDRO) with exponential temperature dependence. Thanks to the proposed robust and reconfigurable Schmitt-trigger-based delay cell, both NMOS and PMOS leakage-based sensors can be evaluated in a single design. Fabricated in a standard 55-nm CMOS digital process, the proposed digital temperature sensor occupies a silicon area of only 1770 $\mu \text{m}<^>{2}$ and can operate under a supply ranging from 0.8 to 1.3 V, with the supply sensitivities of 2.53-5.22 degrees C/V and 2.84-5.76 degrees C/V in two working modes at room temperature, respectively. Measurement results show that the sensor achieves an inaccuracy of +/- 0.70 degrees C (3 $\sigma $ ) from -40 degrees C to 125 degrees C after two-point calibration.