Size effect of electronic properties in highly arsenic-doped silicon nanowires

The unique electrostatic properties of semiconductor nanowires enable the realization of novel transistor types by the possibility to use surround gate architectures resembling ideal gate electrostatic control. Nevertheless one fundamental issue of semiconducting nanowire channels is the reliable control of doping to adjust the charge carrier concentration. Indeed, as dimensions scale down the surrounding media and the interfaces become more important. In this study we experimentally investigate the role of surface depletion and dielectric mismatch on the electronic charge transport of highly arsenic doped and bottom-up grown silicon nanowires. Electrical characterization of silicon nanowires (SiNWs) synthesized by Au catalyzed vapour-liquid-solid (VLS) growth and in-situ arsine (AsH3) doping is reported for the first time. We demonstrate that high n-type doping is possible by adjusting the dopant precursor flow ratio during growth. Based on electrical measurements of individual nanowires, reproducible donor concentrations of up to 5.2 x 10(19) cm(-3) could be revealed. By measuring the electrical characteristics for individual nanowires in dependence of their radius, we show that the electrically active carrier density drastically reduces for small nanowires at radii much larger than those at which quantization or dopant surface segregation effects are expected to occur. Furthermore, enhancement of the contact transparency for small radii nanowires is demonstrated through dopant segregation upon metal silicidation. Size dependent measurement of electrical characteristics revealed improved contact resistivities as low as 1.4 x 10(-11) Omega m(2).