期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 66, 期 10, 页码 4348-4353出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2019.2934168
关键词
Bilayer electret; charge trapping layer (CTL); discrete trap states; organic nonvolatile memory (ONVM)
In this article, we have fabricated organic nonvolatile memory (ONVM) transistors using different thicknesses of poly(alpha-methyl styrene) (P alpha MS) as tunneling layers on Si substrateswith a SiO2 layer of 50 nm. With a tunneling layer thickness of 6 nm, the fabricated devices achieved an operation voltage of -12 V. To this structure, we added a 12-nm-thick poly(vinylalcohol) (PVA) film as the charge trapping layer. Compared with the deviceswithout an additional trapping layer, the bilayer devices showed a larger memory windowof 9.8 V if a programming voltageof 28Vwas applied for 1 s, and a memory window of 8 V is reached after a programming time of only 0.2 s. Furthermore, the retention and endurance properties of the bilayer devices were also improved. Above all, using the combination of non-polar and polar polymers as a bilayer electret provides an easy strategy to optimize charge trapping properties for ONVMs.
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