期刊
NANO LETTERS
卷 19, 期 10, 页码 7130-7137出版社
AMER CHEMICAL SOC
DOI: 10.1021/acs.nanolett.9b02660
关键词
Gate quantum capacitance; limited density of states; low-dimensional gate; carbon nanotube gate; gate charge limited MOSFET; gate starvation; CNT-gated SOI MOSFET
类别
资金
- Electronics Materials program - Office of Science, Office of Basic Energy Sciences, Material Sciences and Engineering Division of the U.S. Department of Energy [DE-AC02-05CH11231]
- Lam Research Graduate Fellowship
As the physical dimensions of a transistor gate continue to shrink to a few atoms, performance can be increasingly determined by the limited electronic density of states (DOS) in the gate and the gate quantum capacitance (C-Q). We demonstrate the impact of gate C-Q and the dimensionality of the gate electrode on the performance of nanoscale transistors through analytical electrostatics modeling. For low-dimensional gates, the gate charge can limit the channel charge, and the transfer characteristics of the device become dependent on the gate DOS. We experimentally observe for the first time, room-temperature gate quantization features in the transfer characteristics of single-walled carbon nanotube (CNT)-gated ultrathin silicon-on-insulator (SOI) channel transistors; features which can be attributed to the Van Hove singularities in the one-dimensional DOS of the CNT gate. In addition to being an important aspect of future transistor design, potential applications of this phenomenon include multilevel transistors with suitable transfer characteristics obtained via engineered gate DOS.
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